Since it is possible to update logic functions also after product shipment, a programmable integrated circuit such as an FPGA (Field Programmable Gate Array) is used in various computer systems. The FPGA includes a configuration data storage memory which stores configuration data to define logic operation and a built-in circuit which executes the logic operation defined by the configuration data.
In case, a fault, for example, such as bit flip by a soft error occurs in the configuration data storage memory, since contents of the configuration data change, the FPGA malfunctions. In recent years, with the advance of capacity increase in the configuration data storage memory, occurrences of faults about the FPGA due to a soft error and so on are increasing. From such a background, a technology to avoid or repair a fault in the FPGA is growing in importance.
As a technology to cope with such the fault in the FPGA, an apparatus which divides the FPGA into a plurality of physical layout areas, and for each layout area, memorizes in advance the configuration data for realizing target logic function not using the layout area concerned is disclosed in Japanese Unexamined Patent Application Publication No. 1997-62528. When a fault in the FPGA is detected, this apparatus specifies a layout area where the fault occurred, makes the layout area where the fault occurred to an unused state by revising the original configuration data to the configuration data which does not use the layout area concerned, and continues operation of the system.
Also, in Japanese Unexamined Patent Application Publication No. 2008-15965, an apparatus which, in case a fault in the FPGA is detected, by comparing the configuration data about the FPGA with an expected value, determines whether the fault is caused by a soft error in the configuration data storage memory is disclosed. In case the fault in the FPGA is caused by the soft error in the configuration data storage memory, this apparatus repairs the fault in the FPGA by writing the expected value in the configuration data storage memory.